Counter Interview Question Answer - 2

How many flip flops are required for 2N count?

One flip flop counts up to 2 pulses, two flip flops count up to 22 = 4 pulses. Similarly N flip flop count up to 2N pulses.

What to do for invalid states in the synchronous and asynchronous counter?

The synchronous and asynchronous counter goes from invalid state to valid state by providing external logic circuit which properly reset each flip flop.

Explain the lock out state of the counter

Lock out

The counter may move from one unused state to other unused state and never come to its valid state is called as lock out state of the counter. The lock out problem occurs due to noise spikes. This counter becomes useless.

Explain the term : Forward / Backward counter

Forward / Backward counter ( Bi- directional counter )

( UP / DOWN counter )

It is a counter which can count in both upward and downward directions.

Why the skipping of state may occur in the asynchronous counter?


Write the relation between propagation delay time and clock frequency. What is importance of propagation delay time?

The relation between propagation delay and clock frequency is

  fc < ( 1 / ntpd )

   fc = Clock frequency

   n = Number of stages and

 tpd = Propagation delay time

Importance of propagation delay time

The propagation delay time imposes a limit on frequency at which the counter can be clocked in the ripple counter.

Why the ripple counters are connected in cascaded? How cascaded connection is done?

Cascaded connection of ripple counter

The ripple counters are connected in cascaded in order to increase the modulus of the counter. The cascading of the counter is done by connecting the most significant stage of the first counter to the toggling stage of the second counter.

Explain the term : Decoding of the counter, Glitches of the counter, Strobing

Decoding of the counter

The decoding of the counter is done by decoder or gates.

The output of the counter is in the binary form and it is converted in the decoding form by a decoder.

Glitches of the counter

The transitional states in the asynchronous counter produces undesirable voltage spikes of short duration at the output of the decoder is called as the glitches. The transition state is creating by propagation delay.


It is a method to eliminate glitches. The glitch can eliminate by enabling the decoder output at a time after glitches have had time to disappear. This can be achieved by using LOW level of the clock to enable the decoder.

Which gate is used for active HIGH decoding and active LOW decoding?

AND gate

What is width of glitches in the counter?

The width of glitches is equal to width of the propagation delay.

How the glitch affects if the decoder output drive edge triggered circuit? How to reduce it?     

Effect of Glitches

If the decoder output drives edge triggered circuit, the glitch produces unsatisfactory performance. This effect is reduced by ANDing the decoder with the clock. However, this will reduce the width of deglitched output to the width of clock pulse which causes gaps between decoder outputs.

Why the asynchronous counters are slow?

The asynchronous counters are slow because each flip flop can change state only if all the preceding flip flops have changed their state.

What is synchronous counter?

Synchronous counter

It is a counter in which all the flip flops are triggered simultaneously.

Give reason : The clock frequency of the asynchronous counter should be low.

Clock frequency of the asynchronous counter

If the clock frequency of the asynchronous counter should be high, the counter may skip some of the states and malfunction occurs.

Why the synchronous counter can be operated at much higher frequency than the asynchronous counter?

Synchronous counter

The propagation delay of the synchronous counter is equal to propagation delay of the single flip flop and gates.

Therefore, the synchronous counter can be operated at high frequency.

Asynchronous counter

The propagation delay of the asynchronous counter is equal to propagation delay of all flip flops.

Describe the advantages and disadvantages of the synchronous counter.


High speed

Less severe decoding problem


It requires more circuit as compared to asynchronous counter.

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