61
|
Why the NMOS is popular than that of the PMOS?
|
|
The NMOS is popular to that of PMOS due to
following reasons
- The operating
speed of the NMOS is about three times to that of the PMOS.
- The package
density of the NMOS is twice to that of the PMOS.
|
62
|
Describe
the advantages of the CMOS over the PMOS and the NMOS.
|
|
Advantages of CMOS
over the PMOS and the NMOS
- High speed
- Low power
consumption
- Improved noise
margin
|
63
|
What
is indicated by the broken or dotted line in the symbol of the PMOS and NMOS?
|
|
The dotted line in the PMOS or NMOS
indicates that there is no conducting channel between electrodes.
|
64
|
Why
the fan out of the CMOS is very high?
|
|
The fan out of the CMOS is very high because
it draws almost zero current from the driving gate.
|
65
|
Why
the CMOS is faster than that of NMOS?
|
|
The CMOS is faster than that of the NMOS
because its output impedance is small as compared to that the NMOS.
|
66
|
Describe
the effect of supply voltage on the noise margin of the CMOS.
|
|
As the supply voltage increases the noise
margin of the CMOS is also increases.
|
67
|
Why
the CMOS is preferred in noisy environment?
|
|
The CMOS is preferred in noisy environment
because its noise margin is only 30% of supply voltage.
|
68
|
Why
the CMOS is also called as bilateral transmission gate or bilateral switch?
|
|
The CMOS is also called as bilateral switch
because it transmits signals in both directions.
|
69
|
Name
two unidirectional gate logic devices.
|
|
ECL and TTL
|
70
|
At
which condition, the control transmit signal from input to output in the CMOS
transmission gate?
|
|
The control transmit signal from input to
output in the CMOS gate when the CONTROL is HIGH.
|
71
|
Describe
the effect of supply voltage and frequency on the power dissipation of the CMOS.
|
|
As the supply voltage and frequency
increases the power dissipation of the CMOS increases.
|
72
|
Describe
the effect of supply voltage on the speed of the CMOS gate.
|
|
As the supply voltage increase the speed of
the CMOS gate increases.
|
73
|
Why the
power consumption is very low in the dynamic MOS logic?
|
|
The power consumption of the dynamic MOS
logic is very low because of inherent capacitance of the MOS transistors to
store logic levels.
|
74
|
What
do you mean by interfacing?
|
|
Interfacing
- The
interfacing means the output of the one circuit is connected to the input of
the other circuit that has different characteristics.
|
75
|
Explain
the term : Two phase non – over lapping clock
|
|
Two phase non – over
lapping clock
- The dynamic
MOS inverter consists of two control signals that are used to control the
transistors.
- These two control signals together are called as two phase non –
over lapping clock.
|
76
|
Which
type of interfacing logic is used in the De – multiplexers? Why?
|
|
The transfer of input data in the De –
multiplexer is at a faster rate and output data at slower rate therefore ECL
to TTL interfacing logic is used.
|
77
|
Which
type of interfacing logic is used when the input data handle much lower rate
than the output data?
|
|
TTL to ECL logic
|
78
|
Which
type of interfacing logic is used for low input current and high output
current logic?
|
|
CMOS to TTL logic
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