- The full form of the UJT is uni junction transistor.
- It is a single PN junction semiconductor switching device.
- It has
three terminals : base 1 ( B
_{1}), base 2 ( B_{2}) and emitter. The structure and symbol of the UJT is shown in the Figure A.

Structure

- The UJT consists of lightly doped N
type silicon bar with terminal ends with base 1 ( B
_{1}) and base 2 ( B_{2}). - A small heavily doped P type material is alloyed to its one side for producing single PN junction.
- The terminal brought out from P type material is called as emitter ( E ).
- The P type material ( emitter E ) is placed closer to base 2 rather than base 1.
- The arrow in the emitter shows the direction of the forward current through the junction and it is inclined towards base 1 terminal.

Equivalent circuit of the UJT

- The equivalent circuit of the UJT is
shown in the Figure B. The resistance between terminal base 1 and base 2 with
emitter open is called as inter - base resistance ( R
_{BB}). Therefore R_{BB}= R_{B1}+ R_{B2}

Where

R

_{BB}= Inter base resistance
R

_{B1}= Resistance between terminal base B_{1}and emitter
R

_{B2}= Resistance between terminal base B_{2}and emitter- The value of inter base resistance lies is in the range of 4.7 kilo ohm to 10 kilo ohms.
- The value of R
_{B1}and R_{B2}depends upon where the P type material is located along the n type bar material. - As the emitter ( E ) is located closer to base 2 terminal
, the resistance R
_{B2}is greater than the R_{B1}.

Instrinsic Ratio ( η )

- The battery V
_{BB}is connected between terminal base 1 and base 2 as shown in the Figure B. - The
point A acts as voltage divider point for the resistance R
_{BB}. - Let
the voltage drop across resistance R
_{B1}is V_{A}. According to voltage divider rule

V

_{A}= [ R_{B1}/ ( R_{B1}+ R_{B2}) ] V_{BB}
V

_{A}= ηV_{BB}- The η is called as intrinsic standoff ratio and its value lies in the range of 0.5 to 0.85. Therefore the intrinsic standoff ratio is given by

η = [ R

_{B1}/ ( R_{B1}+ R_{B2}) ]
= V

_{A}/ V_{BB}
Operation of the UJT

- The basic circuit for the operation of the UJT is shown in the Figure C.
- The DC voltage source VEE is kept variable and DC voltage source VEE is generally kept fixed.
- We consider following two cases for the operation of the UJT.

When NO voltage is applied to the
emitter

- The voltage between point A and base 1 reverse biased the PN junction in this condition therefore the emitter is cut off.
- Therefore small amount of leakage current flows from the base 2 to the emitter E due to minority charge carriers.

When a positive voltage is applied
at the emitter

- The voltage drop across R
_{B1}is given by

V

_{A}= ηV_{BB}- If the thresh – hold voltage of the
diode is given by voltage V
_{D}, the reverse bias voltage

= V

_{A}+ V_{D}
= ηV

_{BB }+ V_{D}- The value of V
_{D }= 0.7 voltage for the silicon diode - The voltage V
_{EE}is applied to the emitter increases progressively. - The diode becomes forward
biased when the voltage V
_{EE}exceeds total reverse biased voltage. - The value of the voltage is called is peak point voltage and it is given by

V

_{P}= ηV_{BB }+ V_{D}- The emitter current start to flow and holes of the emitter are injected into N type bar.
- These holes are repelled
to base 2 and attracted by base 1 terminal resulting current I
_{P}start to flow through R_{B1}. - When the emitter to base 1 voltage V
_{EE}increases beyond peak point voltage V_{P}, the emitter current decreases. - The resistance R
_{B1}decreases due to minority charge carriers therefore the voltage drop V_{A}decreases. - This will result in emitter current increases regenerative until it is limited by external power supply.
- It should be noted that emitter E and base 1 are active terminals and base 2 is only used for applying triggering external voltage across base 1and base 2 terminals.
- The UJT can be turned off by applying negative trigger pulse to its emitter terminal E.

Characteristic of the UJT

- The static ( voltage – current ) characteristic of the UJT is shown in the Figure D.
- The emitter junction
becomes reverse biased when V
_{EE}< η V_{BB}+ V_{D}resulting small leakage current flows through the device. - When V
_{EE}< η V_{BB}+ V_{D}, the emitter junction becomes forward biased and emitter current start to flow. - The current corresponding to point P is called as Peak point current.
- Now the holes of the emitter region injects in to N type bar region.
- These holes are attracted by base 1 region. It means that it decrease the voltage drop between point A and base 2.
- Consequently it further increases the forward bias of the PN junction and further increases the current.

- This process continues until the current increases up to valley point.
- The valley point current I
_{V }is so large that the conductivity between point A and base 1 does not increases further. - The emitter current is limited by the external resistor R
_{E}. - The slope of the UJT characteristic under conducting state ( V
_{P}– V_{V}) is very steep resulting very low resistance. - Therefore the region between V
_{P}– V_{V}is known as negative resistance region. - The UJT behaves as a conventional forward biased PN junction diode beyond valley point.
- If the emitter current I
_{E}decreases below valley current, the UJT turns OFF. - Therefore the valley current ( similar to holding current ) is minimum emitter current to keep the UJT is in ON state.

Application

- Pulse generation
- Saw tooth generation
- Sinusoidal wave generation
- Switching
- SCR / TRIAC triggering circuit
- Timing circuit and
- Oscillators

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why it is called intrinsic stand off ratio. why the word intrinsic is used?

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